1. Field of the Invention
The invention relates to a pixel structure and more particularly to a pixel array having a half source driving (HSD) structure.
2. Description of Related Art
With the development of large display panel nowadays, the so called half source driving (HSD) structure is widely used for a pixel array structure of liquid crystal display. Since the number of data lines may be reduced to half by using the HSD pixel structure, the price of the source driver is reduced accordingly. More specifically, the HSD structure includes a plurality of pixel units, each of the pixel units includes two neighbouring sub-pixels which share one data line, thereby reducing the number of data lines to half.
Generally, each of the sub-pixels includes a thin-film transistor, a capacitor and a pixel electrode. The thin-film transistor includes a gate electrode, a channel layer, a source electrode and a drain electrode. The gate electrode is electrically connected to the scan line, the source electrode is electrically connected to the data line, and the drain electrode is electrically connected to the pixel electrode. The capacitor is used to storage capacitance. When the thin-film transistor is turned off after charging to each of the sub-pixels is completed, the voltage level of the pixel electrode in each of the sub-pixels may easily changed by nearby voltage variation, and the amount of such voltage variation is known as feed-through voltage. Generally, feed-through voltage is affected by the gate/drain parasitic capacitance and the storage capacitance in each of the sub-pixels.
The patterns of the thin-film transistors in the HSD pixel structure is normally designed symmetrically in mirror. For example, the orthogonal projection patterns of two thin-film transistors sharing the data line on XY plane are upside-down patterns which are symmetrical in mirror. However, as the development of display panel follows the trend of becoming larger in size, when an exposing process is performed using a photomask for manufacturing a large display panel, since overall accuracy of large photomask is difficult to control due to factors like thermal expansion and cold shrinkage, overlapping alignment error (or overlay variation) in each metal layer of the thin-film transistor may easily become larger. Accordingly, overlapping areas between the metal layer, the channel layer and the gate electrode of the thin-film transistors in the neighbouring sub-pixels may be different, such that the gate/drain parasitic capacitances of the thin-film transistors of the neighbouring sub-pixels are different, therefore, feed-through voltages thereof may also be different. As a result, the display quality of the display panel may be affected thereby.